1. Field of the Invention
This invention relates to a semiconductor memory device and, more particularly, to a semiconductor memory device having a plurality of terminals for inputting or outputting data comprising plural bits, and the method for operating the memory device.
2. Description of the Background Art
The semiconductor memory device of various word organizations are currently employed. For example, as for the 1M bit dynamic random access memory (referred to hereinafter as DRAM), there are presently two kinds of word organizations, namely 1M word.times.1 bit and 256K word.times.4 bit word organizations. The DRAM of the 1M word.times.1 bit word organization is employed in a system in need of a larger memory capacity, such as a large sized computer, whereas the DRAM of the 256K word.times.4 bit organization is employed in a system in need of a smaller memory capacity, such as a personal computer or a word processor.
In these memory systems, data with parity bits annexed thereto are frequently employed. For example, when one parity bit is annexed to the 1-byte or 8-bit data, each unit of the processed data is made up of 9 bits. In such case, with a system having a smaller memory capacity, such as personal computer or a word processor, three DRAMs each being of a 256K word.times.4 bit organization, are necessitated. In one DRAM 101 of the three DRAMs in FIG. 9, 4-bit data D0 to D3 of the 8-bit data are stored, whereas, in another DRAM 102 of the DRAMs, the remaining 4-bit data D4 to D7 are stored. In the remaining DRAM 103, a parity bit PB is stored. Thus the four data input/output terminals are employed in their entirety in two of the three DRAMs 101 to 103, whereas only one input/output terminal is used in the remaining DRAM.
In a DRAM provided with plural input/output terminals, plural source amplifiers are provided in association with the input/output terminals. A major portion of the power consumed in a DRAM is consumed at a sense amplifier charging and discharging the bit lines. With conventional DRAMs, the totality of the sense amplifiers are always in operation irrespective of the number of the input/output terminals employed. Thus there is not much difference in the power consumption of the DRAM, no matter whether only one input/output terminal is in use or all of the four input/output terminals are in use.
Recently, in keeping with reduction in size of the personal computers and word processors, or coming into popular use of the laptop type personal computer as a word processor, battery backup has become necessary. Consequently, there is a demand for reducing power consumption by the memory system to as small a value as possible, and hence a demand for eliminating wasteful power consumption.